Advances in semiconductor processing and logic design have permitted an increase in the amount of logic that may be present on integrated circuit devices. As a result, computer system configurations have evolved from multiple integrated circuits in a system to multiple hardware threads, multiple cores, multiple devices, and/or complete systems on an individual integrated circuit. As the density of integrated circuits has grown, the power requirements for computing systems (from embedded systems to high performance computing (HPC) systems) have also escalated.
Power and thermal management issues are considerations in designing computer-based systems. In HPC systems, for example, a specified thermal design power (TDP) and/or the cost of electricity may drive the need for low power systems. In other systems, including mobile systems, battery life and thermal limitations make these issues relevant. Optimizing a system for maximum performance at minimum power consumption is usually done using the operating system (OS) or system software to control hardware elements.
One example of an OS-based mechanism for power management is the Advanced Configuration and Platform Interface (ACPI) standard. According to ACPI, a processor can operate at various performance states or levels, namely from P0 to PN. In general, the P1 performance state may correspond to the highest guaranteed performance state that can be requested by an OS. In addition to this P1 state, the OS can further request a higher performance state, namely a P0 state. This P0 state may thus be an opportunistic state in which, when power and/or thermal budget is available, processor hardware can configure the processor or at least portions thereof to operate at a higher than guaranteed frequency. As discussed below, however, such solutions are sub-optimal in handling performance variations across collaborating threads on systems in which the objective is to have multiple threads complete a particular task (or a task phase) at the same time.